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Electrical Specifications Subject to Change
LTC3425 5A, 8MHz, 4-Phase Synchronous Step-Up DC/DC Converter
June 2003
FEATURES
s s s
DESCRIPTIO
s s s s s s
s s s s s s s
High Efficiency: Up to 95% Up to 3A Continuous Output Current 4-Phase Operation for Low Output Ripple and Tiny Solution Size Output Disconnect and Inrush Current Limiting Very Low Quiescent Current: 12A 0.5V to 4.5V Input Range 2.4V to 5.25V Adjustable Output Voltage Adjustable Current Limit Adjustable, Fixed Frequency Operation from 100kHz to 2MHz per Phase Synchronizable Oscillator with Sync Output Internal Synchronous Rectifiers Manual or Automatic Burst Mode(R) Operation Power Good Comparator <1A Shutdown Current Antiringing Control 5mm x 5mm Thermally Enhanced QFN Package
The LTC(R)3425 is a synchronous, 4-phase boost converter with output disconnect capable of operation below 1V input. It includes four N-channel MOSFET switches and four P-channel synchronous rectifiers for an effective RDS(ON) of 0.045 and 0.05, respectively. 4-phase operation greatly reduces peak inductor currents, capacitor ripple current and increases effective switching frequency, minimizing inductor and capacitor sizes. True output disconnect eliminates inrush current and allows zero load current in shutdown. External Schottky diodes are not required in most applications (VOUT < 4.3V). Power saving Burst Mode operation can be user controlled or left in automatic mode. Other features include 1A shutdown current, programmable frequency with sync in and out, programmable soft-start, antiringing control, thermal shutdown, adjustable current limit, reference output and power good comparator. The LTC3425 is available in a small, thermally enhanced 32-pin QFN package.
, LTC and LT are registered trademarks of Linear Technology Corporation. Burst Mode is a registered trademark of Linear Technology Corporation.
APPLICATIO S
s s s
Handheld Computers Point-of-Load Regulators 3.3V to 5V Conversion
TYPICAL APPLICATIO
VIN 2V TO 3V 2.2F 2.7H
2.7H
2.7H
2.7H
VIN OFF ON SHDN REFOUT CCM REFEN SYNCIN BURST 0.01F 15k 20k 75k RT ILIM SGND
SWA
SWB
SWC
EFFICIENCY (%)
SWD VOUTS VOUTA VOUTB VOUTC VOUTD 4.7F x4 1M 10k
VOUT 3.3V 2A
LTC3425 FB COMP SS SYNCOUT PGOOD GNDC GNDD
22pF 330pF 33k 0.01F
3425 TA01
590k
GNDA
GNDB
CIN: TAIYO YUDEN JMK107BJ225MA COUT: TAIYO YUDEN JMK212BJ475MG (x4)
L1-L4: TDK RLF5018T-2R7M1R8
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
100 90 80 70 60 50 40 30 Burst Mode OPERATION 20
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U
FIXED FREQUENCY MODE
VIN = 2.4V VOUT = 3.3V 10 f = 1MHz L = 2.7H 0 1 10 100 1000 0.1 LOAD CURRENT (mA)
10000
3425 TA02
1
LTC3425
ABSOLUTE
(Note 1)
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
SYNCOUT
VIN Voltage ................................................. - 0.3V to 6V SWA-D Voltages DC .......................................................... - 0.3V to 6V Pulsed < 100ns ...................................... - 0.3V to 7V VOUTA-D, VOUTS Voltages............................ - 0.3V to 6V BURST, SHDN, SS, REFEN, SYNCOUT, PGOOD, CCM, SYNCIN Voltages .............................. - 0.3V to 6V Operating Temperature Range (Note 5)... - 40C to 85C Storage Temperature Range ................. - 65C to 125C Lead Temperature (Soldering, 10 sec).................. 300C
TOP VIEW
SYNCIN SHDN CCM ILIM VIN SS RT
32 31 30 29 28 27 26 25 GNDA 1 GNDA 2 SWA 3 VOUTA 4 VOUTB 5 SWB 6 GNDB 7 GNDB 8 9 10 11 12 13 14 15 16
REFEN SGND FB COMP REFOUT PGOOD BURST VOUTS
24 GNDD 23 GNDD 22 SWD 33 21 VOUTD 20 VOUTC 19 SWC 18 GNDC 17 GNDC
UH PACKAGE 32-LEAD (5mm x 5mm) PLASTIC QFN
TJMAX = 125C, JA = 40C/W 1 LAYER BOARD, JA = 35C/W 4 LAYER BOARD EXPOSED PAD IS ???? (PIN 33) MUST BE SOLDERED TO PCB
ORDER PART NUMBER LTC3425EUH
UH PART MARKING 3425
Consult LTC Marketing for parts specified with wider operating temperature ranges.
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VIN = 1.2V, VOUT = 3.3V, RT = 15k, unless otherwise noted.
PARAMETER Minimum Start-Up Voltage Minimum Operating Voltage Output Voltage Adjust Range Feedback Regulation Voltage Feedback Input Current VOUT Quiescent Current--Burst Mode Operation VIN Quiescent Current--Shutdown VOUT Quiescent Current--Active NMOS Switch Leakage PMOS Switch Leakage NMOS Switch On Resistance PMOS Switch On Resistance NMOS Current Limit VFB = 1.25V BURST = 0V, REFEN = 0V, FB = 1.3V (Note 2) BURST = 0V, REFEN = 2V, FB = 1.3V (Note 2) SHDN = 0V, VOUT = 0V, Not Including Switch Leakage VC = 0V, Nonswitching (Note 2) VSW = 5V VSW = 5V, VOUT = 0V (Note 4) (Note 4) ILIM Resistor = 75k (Note 4) ILIM Resistor = 200k (Note 4)
q q
ELECTRICAL CHARACTERISTICS
CONDITIONS VOUT = 0V, ILOAD < 1mA SHDN > 0.65V (Note 3)
q q q
MIN
TYP 0.88
MAX 1 0.5 5.25
UNITS V V V V nA A A A mA A A A A
2.4 1.196 1.220 1 12 18 0.1 1.8 0.1 0.1 0.045 0.05 5.0 1.8 7.0 2.7
1.244 50 25 35 1 5 10
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W
U
U
WW
W
LTC3425
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VIN = 1.2V, VOUT = 3.3V, RT = 15k, unless otherwise noted.
PARAMETER PMOS Turn-Off Current PMOS Current Limit Max Duty Cycle Min Duty Cycle Frequency Accuracy SHDN Input High SHDN Input Low SHDN Input Current REFEN, CCM Input High REFEN, CCM Input Low REFEN, Input Current SYNCIN Input High SYNCIN Input Low SYNCIN Input Current CCM Input Current SYNC Input Pulse Width SYNC Out High SYNC Out Low REFOUT REFOUT Error Amp Transconductance Error Amp Output High Error Amp Output Low PGOOD Threshold (Falling Edge) PGOOD Hysteresis PGOOD Low Voltage PGOOD Leakage SS Current Source Burst Threshold Voltage (Falling Edge) Burst Threshold Hysteresis Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: Current is measured into the VOUTS pin since the supply current is bootstrapped to the output. The current will reflect to the input supply by VOUT/(VIN * Efficiency). The outputs are not switching. Note 3: Once the output is started, the IC is not dependent on the VIN supply as long as SHDN > 0.65V. Note 4: Total with all four FETs in parallel. Referenced to Feedback Voltage Referenced to Feedback Voltage ISINK = 1mA (10mA Max) VPGOOD = 5.5V VSS = 1V
q q q q q q
ELECTRICAL CHARACTERISTICS
CONDITIONS CCM < 0.4V CCM > 1.4V
q q
MIN
TYP -80 0.6
MAX
UNITS mA A
83 0.8 1 0.65
90 1
97 0 1.2
% % MHz V V
RT = 15k VOUT = 0V (Initial Start-Up) VOUT > 2.4V VSHDN = 0V, 3.3V VSHDN = 2V
q q q q
0.25 0.01 -0.50 1
V A A V V A V V A A s V
q q
1.4 0.4 0.01 1 0.5 0.3 1.7 1 4 2.5
VREFEN = 5V
q q
VSYNCIN = 5V VCCM = 5V
q
0.1 3 0.4
V V V S V V
REFEN > 1.4V, No Load ISOURCE < 100A, ISINK < 10A, REFEN > 1.4V ILIM Resistor = 75k
q q
1.190 1.184
1.220 1.22 50 2.2 0.15
1.251 1.252
-9.5 1.5
-11.4 2.5 0.12 0.01 -2.5
-13.5 3.5 0.25 1 1.04
% % V A A V mV
0.84
0.94 115
Note 5: The LTC3425E is guaranteed to meet performance specifications from 0C to 70C. Specifications over the -40C to 85C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 6: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may result in device degradation or failure.
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LTC3425 TYPICAL PERFOR A CE CHARACTERISTICS
SWA, SWB, SWC, SWD at 1MHz/Phase SW Pin and Inductor Current in Discontinous Mode. Antiring Circuit Eliminates High Frequency Ringing
SWA TO SWD 5V/DIV
250ns/DIV
Transient Response 0.5A to 1.5A Fixed Frequency Mode Operation
VOUT AC 100mV/DIV VOUT AC 50mV/DIV LOAD CURRENT 0.5A/DIV
VIN = 2.4V VOUT = 3.3V COUT = 220F
100s/DIV
Soft-Start and Inrush Current Limiting
IIN 0.5A/DIV SS Pin 1V/DIV VOUT 2V/DIV VOUT AC 50mV/DIV
VIN = 2.4V 500s/DIV VOUT = 3.3V CSOFTSTART = 0.015F
4
UW
SW Pin and Oscillator SYNCOUT
SWA 2V/DIV SYNCOUT 2V/DIV
IL 0.2A/DIV
SW 2V/DIV
3425 G01
250ns/DIV
3425 G02
VIN = 2.4V VOUT = 3.3V COUT = 220F
250ns/DIV
3425 G03
Output Voltage Ripple at 2.5A Load with Only Four 4.7F Ceramic Capacitors
Output Voltage Ripple at 2.5A Load with a 47F Ceramic Bulk Capacitor
VOUT AC 10mV/DIV
3425 G04
VIN = 2.4V 500ns/DIV VOUT = 3.3V FREQUENCY = 1MHz/PHASE
3425 G05
VIN = 2.4V 500ns/DIV VOUT = 3.3V FREQUENCY = 1MHz/PHASE
3425 G06
Burst Mode Operation
IOUT 1A/DIV SWA 2V/DIV BURST PIN 1V/DIV
Transient Response 10mA to 1A Automatic Burst Mode Operation
VOUT AC 200mV/DIV VIN = 2.4V VOUT = 3.3V COUT = 220F 25s/DIV
3425 G07
3425 G08
VIN = 2.4V VOUT = 3.3V COUT = 220F
1ms/DIV
3425 G10
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LTC3425 TYPICAL PERFOR A CE CHARACTERISTICS
Converter Efficiency for VOUT = 3.3V
100 90 80
EFFICIENCY (%)
100
VIN = 2.4V VIN = 1.2V
EFFICIENCY (%)
60 50 40 30 20 10 TJ = 25C 0 0.1 1
VIN = 2.4V VIN = 1.2V
60 50 40 30 20
VIN = 3.3V
VIN = 2.4V
EFFICIENCY (%)
70
Burst Mode OPERATION 1MHz/PHASE 10 100 1000 OUTPUT CURRENT (mA) 10000
3425 G11
Efficiency Comparison of Discontinuous Mode and Forced Continuous Mode at Light Loads for VIN = 2.4V, VOUT = 3.3V
100 90 80 DISCONTINUOUS MODE TJ = 25C 100 90 80
CONVERTER INPUT CURRENT (A)
EFFICIENCY (%)
EFFICIENCY (%)
70 60 50 40 30 20 10 0 1 10 100 1000 CONVERTER OUTPUT CURRENT (mA)
3425 G14
FORCED CONTINUOUS MODE
Oscillator Frequency
10 TJ = 25C
1.6 1.4 1.2 1.0 0.8 0.6 60 80 100 120 140 160 ILIM RESISTOR (k) 180 200
RDS(ON) (ALL FOUR PHASES IN PARALLEL)
PEAK CURRENT IN EACH PHASE (A)
FREQUENCY (MHz)
1 1 10 RT (k) 100
3425 G17
UW
Converter Efficiency for VOUT = 5V
98
VIN = 3.3V VIN = 2.4V 90 80 70
Converter Efficiency for 2-, 3- and 4-Phase Operation
TJ = 25C 96 VIN = 2.4V VOUT = 3.3V 94 92 90 4 PHASE 88 86 2 PHASE 84 3 PHASE
10 0 0.1 TJ = 25C 1
Burst Mode OPERATION 1MHz/PHASE 10 100 1000 OUTPUT CURRENT (mA) 10000
3425 G12
82 80 100 1000 LOAD (mA) 10000
3425 G13
Efficiency Comparison of Discontinuous Mode and Forced Continuous Mode at Light Loads for VIN = 3.3V, VOUT = 5V
TJ = 25C 140 120 100 80 60
Converter No Load Input Current vs VIN (Burst Mode Operation)
TJ = 25C
70 60 50 40 30 20 10 0 1
DISCONTINUOUS MODE FORCED CONTINUOUS MODE
VOUT = 5V
VOUT = 3.3V 40 20 0 1.5
10 LOAD (mA)
100
1000
3425 G15
2.0
2.5
3.0 VIN (V)
3.5
4.0
4.5
3425 G16
Peak Current Limit
1.8 TJ = 25C 0.065
Effective RDS(ON)
TJ = 25C
0.060 PMOS 0.055
0.050 NMOS 0.045
0.040 2.5
3
4 3.5 VOUT (V)
4.5
5
3425 G19
3425 G18
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LTC3425 TYPICAL PERFOR A CE CHARACTERISTICS
Maximum Output Current in Burst Mode Operation
350 300 TJ = 25C VOUT = 3.3V VOUT = 5V 200 150 100 50 0 1 1.5 2 2.5 3 VIN (V)
3425 G20
OUTPUT CURRENT (mA)
VOUT = 3.3V
LOAD CURRENT (A)
250
0.5 0.4 VOUT = 5V 0.3 0.2 0.1 0 0.9
AVERAGE LOAD CURRENT (mA)
3.5
Automatic Burst Mode Thresholds vs VIN
100 VOUT = 5V 90
80 70 60 50
LEAVE Burst Mode OPERATION
2.0 1.5 1.0 0.5 VIN < 2.3V (START-UP MODE)
SHUTDOWN VOLTAGE (V)
LOAD CURRENT (mA)
VOUT = 3.3V
SS CHARGE CURRENT (A)
ENTER Burst Mode OPERATION VOUT = 3.3V VOUT = 5V TJ = 25C RBURST = 33k 3.5 4
3425 G23
40 1.5
2
3 2.5 VIN (V)
Minimum Start-Up Voltage vs Temperature
1.00 0.95 START VOLTAGE (V) 0.90 0.85 0.80 0.75 0.70 -45 -25 -5 PGOOD THRESHOLD (1% BELOW VFB) 11.8 11.7 11.6 11.5 11.4 11.3 11.2 11.1 11.0 10.9
PMOS REVERSE CURRENT (mA)
15 35 55 75 TEMPERATURE (C)
6
UW
4 4.5
Maximum Start-Up Load vs VIN (Constant Current Load)
0.7 0.6 TJ = 25C
Automatic Burst Mode Current Thresholds vs RBURST
100 TJ = 25C LEAVE Burst Mode OPERATION ENTER Burst Mode OPERATION
10
5
1.0
1.1
1.2 1.3 VIN (V)
1.4
1.5
1.6
1 10
100 BURST RESISTOR (k)
1000
3425 G22
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Soft-Start Charging Current vs Temperature
3.0 VIN > 2.3V 2.5 0.425 0.400 0.375 0.350 0.325 0.450
Shutdown Voltage vs Temperature
0 -45 -25 -5
15 35 55 75 TEMPERATURE (C)
95 115
3425 G24
0.300 -45 -25 -5
15 35 55 75 TEMPERATURE (C)
95 115
3425 G25
PGOOD Threshold vs Temperature
800 750 700 650 600 550 500 450 400 350 15 35 55 75 TEMPERATURE (C) 95 115
3425 G27
PMOS Reverse Current in Forced CCM vs Temperature
95 115
3425 G26
10.8 -45 -25 -5
300 -45 -25 -5
15 35 55 75 TEMPERATURE (C)
95 115
3425 G28
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LTC3425 TYPICAL PERFOR A CE CHARACTERISTICS
Feedback Voltage vs Temperature
1.230 1.225 1.220 3 2 1 0 -1 -2 -3 -45 -25 -5
OSCILLATOR (NORMALIZED) (%)
PEAK ILIM (NORMALIZED) (%)
VFB (V)
1.215 1.210 1.205 1.200 -45 -25 -5
15 35 55 75 TEMPERATURE (C)
Burst Mode VOUT Quiescent Current vs Temperature
20 55
QUIESCENT CURRENT (A)
15 gm (S)
10
5 -45 -25 -5
UW
95 115
Peak Current Limit vs Temperature
2.0 1.5 1.0 0.5 0 -0.5 -1.0 -1.5
Oscillator Frequency vs Temperature
15 35 55 75 TEMPERATURE (C)
95 115
3425 G30
-2.0 -45 -25 -5
15 35 55 75 TEMPERATURE (C)
95 115
3425 G31
3425 G29
Error Amplifier gm vs Temperature
50
45
15 35 55 75 TEMPERATURE (C)
95 115
3425 G32
40 -45 -25 -5
15 35 55 75 TEMPERATURE (C)
95 115
3425 G33
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LTC3425
PI FU CTIO S
GNDA-D (Pins 1, 2, 7, 8, 17, 18, 23, 24): Power Ground for the IC and the Four Internal N-channel MOSFETs. Connect directly to the power ground plane. SWA-D (Pins 3, 6, 19, 22): Switch Pins. Connect inductors here. Minimize trace length to keep EMI to a minimum. For discontinuous inductor current, a controlled impedance is internally connected from the SW pins to VIN to minimize EMI. For applications where VOUT > 4.3V, it is required to have Schottky diodes from SW to VOUT or a snubber circuit to stay within absolute maximum rating on the SW pins. VOUTA-D (Pins 4, 5, 20, 21): Output of the Four Synchronous Rectifiers. Connect output filter capacitors to these pins. Connect one low ESR ceramic capacitor directly from each pin to the ground plane. REFEN (Pin 9): Pull this pin above 1.4V to enable the REF output. Grounding this pin turns the REF output off to reduce quiescent current. VOUTS (Pin 10): VOUT Sense Pin. Connect VOUTS directly to an output filter capacitor. The top of the feedback divider network should also be tied to this point. SGND (Pin 11): Signal Ground Pin. Connect to ground plane, near the feedback divider resistor. FB (Pin 12): Feedback Pin. Connect FB to a resistor divider, keeping the trace as short as possible. The output voltage can be adjusted according to the following formula: VOUT = 1.22 * R1 + R2 R1 COMP (Pin 13): Error Amp Output. A frequency compensation network is connected from this pin to ground to compensate the loop. See the section Closing the Feedback Loop for guidelines. BURST (Pin 14): Burst Mode Threshold Adjust Pin. A resistor/capacitor combination from this pin to ground programs the average load current at which automatic Burst Mode operation is entered. For manual control of Burst Mode operation, ground the BURST pin to force Burst Mode operation or connect it to VOUT to force fixed frequency PWM mode. Note that the BURST pin must not be pulled higher than VOUT. REFOUT (Pin 15): Buffered 1.22V Reference Output. This pin can source up to 100A and sink up to 10A (only active when the REFEN pin is pulled high). This pin must be decoupled with a 0.1F capacitor for stability. PGOOD (Pin 16): Open-Drain Output of the Power Good Comparator. This pin will go low when the output voltage drops 11% below its regulated value. Maximum sink current should be limited to 10mA. SYNCOUT (Pin 25): Sync Output Pin. A clock is provided at the oscillator frequency, but phase-shifted 180 degrees to allow for synchronizing two devices for an 8-phase converter. CCM (Pin 26): This pin is used to select forced continuous conduction mode. Normally this pin is grounded to allow CCM or DCM operation. To force continuous conduction mode, tie this pin to VOUT. In this mode, a reverse current of up to about 0.5A will be allowed before turning off the synchronous rectifier. This will prevent pulse skipping at light load when Burst Mode operation is disabled, and will also improve the large-signal transient response when going from a heavy load to a light load. For Burst Mode operation, the CCM pin should be low.
where R1 is connected from FB to SGND and R2 is connected from FB to VOUTS.
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U
U
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LTC3425
PI FU CTIO S
ILIM (Pin 27): Current Limit Adjust Pin. Connect a resistor from ILIM to SGND to set the peak current limit threshold for the N-channel MOSFETs, according to the formula (note that this is the peak current in each inductor): ILIM = 130 R SYNCIN (Pin 30): Oscillator Synchronization Pin. A clock pulse width of 100ns minimum is required to synchronize the internal oscillator. If not used, SYNCIN should be grounded. The typical logic threshold for this input is: VOUT 2 SHDN (Pin 31): Shutdown Pin. Grounding SHDN (or pulling it below 0.25V) shuts down the IC. Pull pin up to 1V to enable. Once enabled, the pin only needs to be 0.65V. SS (Pin 32): Soft-Start pin. Connect a capacitor from this pin to ground to set the soft-start time, according to the formula: t(ms) = CSS (F) * 320 The nominal soft-start charging current is 2.5A. The active range of SS is from 0.8V to 1.6V. Note that this is the rise time of the SS pin. The actual rise time of VOUT will be a function of load and output capacitance.
where I is in Amps and R is in k. Do not use values less than 75k. RT (Pin 28): Connect a resistor from RT to SGND (or SGND plane) to program the oscillator frequency, according to the formula:
fOSC = 60 RT
f 15 fSWITCH = OSC = 4 RT
where fOSC is in MHz and RT is in k. VIN (Pin 29): Input Supply Pin. Connect this to the input supply and decouple with 1F minimum low ESR ceramic capacitor.
OPERATING MODE Automatic Burst (Operating Mode is Load Dependent) Forced Burst Forced Fixed Frequency with Pulse Skipping at Light Load Forced Fixed Frequency, Low Noise (No Pulse Skipping)
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BURST PIN RC Network to Ground Low High High
CCM PIN Low Low Low High
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LTC3425
BLOCK DIAGRA W
1V TO VOUT
+
29 VIN 1 OF 4
3 SWA
6 SWB
19 SWC
22 SWD VOUTA 4 VOUTB 5 P VOUTC 20 VOUT 2.5V TO 5V
FB
0.8V
26
CCM
28
OSC
+
SYNC
30
SYNCIN 4 4 4
+
MODE 25 SYNCOUT SLEEP Burst Mode CONTROL BURST COMP
-
0.94V
ERROR AMP
VREF OFF ON REFOUT 9 15 REFEN
UV VREF 1.22V
+
REFOUT
-
OV GNDA 1 2 GNDB 7 8 GNDC 17 18 GNDD 23 24 SGND 11
10
-
+
OFF ON 31
SHDN
SHUTDOWN -3%
-
THERMAL SHDN
3%
START-UP, SOFT-START AND THERMAL REG BURST 14 SS 32
+
RT
-
+
+
ANTIRING PMOS ENABLE MODE CONTROL PWM LOGIC AND DRIVERS
-
DIVIDER 4-PHASE GEN 4
-
N I/2000
+
VOUTD 21
ZERO
CLK
+
SLOPE
+ +
1.086/ 1.116
VOUTS 10
4 IOSC
+ - -
PGOOD
16
+ -
1.22V FB COMP
12 13
ILIMIT
ILIM 27
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LTC3425
OPERATIO
DETAILED DESCRIPTION The LTC3425 provides high efficiency, low noise power for high current boost applications such as cellular phones and PDAs. The true output disconnect feature eliminates inrush current and allows VOUT to go to zero during shutdown. The current mode architecture with adaptive slope compensation provides ease of loop compensation with excellent transient load response. The low RDS(ON), low gate charge synchronous switches eliminate the need for an external Schottky rectifier, and provide efficient high frequency pulse width modulation (PWM) control. High efficiency is achieved at light loads when Burst Mode operation is entered, where the IC's quiescent current is a low 12A typical on VOUT. MULTIPHASE OPERATION The LTC3425 uses a 4-phase architecture, rather than the conventional single phase of other boost converters. By having multiple phases equally spaced (90 apart), not only is the output ripple frequency increased by a factor of four, but the output capacitor ripple current is greatly reduced. Although this architecture requires four inductors, rather than a single inductor, there are a number of important advantages. * Much lower peak inductor current allows the use of smaller, lower cost inductors. * Greatly reduced output ripple current minimizes output capacitance requirement. * Higher frequency output ripple is easier to filter for low noise applications. * Input ripple current is also reduced for lower noise on VIN. The peak boost inductor current is given by:
OUTPUT RIPPLE CURRENT (A)
ILPEAK =
IO di + (1 - D) * N 2
Where IO is the average load current, D is the PWM duty cycle, N is the number of phases and di is the inductor ripple current. This relationship is shown graphically in Figure 1 using a single phase and a 4-phase example.
U
5 SINGLE PHASE 4 3 FOUR PHASE 2 1 0 0 0.5 TIME (s)
3425 F01
1
1.5
Figure 1. Comparison of Output Ripple Current with Single Phase and 4-Phase Boost Converter in a 2A Load Application Operating at 50% Duty Cycle
Example: The following example, operating at 50% duty cycle, illustrates the advantages of multiphase operation over a conventional single-phase design. VIN = 1.9V, VOUT = 3.6V, Efficiency = 90% (approx), IOUT = 2A, Frequency = 1MHz, L = 2.2H
Table 1
PARAMETER Peak-Peak Output Ripple Current RMS Output Ripple Current Peak Inductor Current Output Ripple Frequency SINGLE PHASE 4.227A 2.00A 4.227A 1MHz FOUR PHASE 0.450A 0.184A 1.227A 4MHz CHANGE FROM 1 TO 4 PHASE Reduced by 89% Reduced by 91% Reduced by 71% Increased by 4x
With 4-phase operation, at least one of the phases will be delivering current to the load whenever VIN is greater than one quarter VOUT (duty cycles less than 75%). For lower duty cycles, there can be as many as two or three phases delivering load current simultaneously. This greatly reduces both the output ripple current and the peak current in each inductor, compared with a single-phase converter. This is illustrated in the waveforms of Figures 2 and 3. Operation Using Only Two or Three Phases The LTC3425 can operate as a 2- or 3-phase converter by simply eliminating the inductor from the unused phase(s).
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LTC3425
OPERATIO U
SWITCH A VOLTAGE SWITCH B VOLTAGE SWITCH C VOLTAGE SWITCH D VOLTAGE INDUCTOR A CURRENT INDUCTOR B CURRENT INDUCTOR C CURRENT INDUCTOR D CURRENT INPUT CURRENT RECTIFIER A CURRENT RECTIFIER B CURRENT RECTIFIER C CURRENT RECTIFIER D CURRENT OUTPUT RIPPLE CURRENT
3425 F02
Figure 2. Simplified Voltage and Current Waveforms for 4-Phase Operation at 50% Duty Cycle
This approach can be used to reduce solution cost and board area in applications not requiring the full power capability of the LTC3425, or where peak efficiency may not be as important as cost and size. In this case, phase A should always be used, since this is the only phase active in Burst Mode operation and phase C is recommended as the second phase for the lowest output ripple, since it is 180 out of phase with phase A. Figure 4 illustrates the efficiency differences with two, three and four phases in a typical 2-cell to 3.3V boost application. In this example,
you can see that for maximum loads less than 1A, the efficiency penalty for using only two or three phases is fairly small. Keep in mind, however, that this penalty will grow larger as the input voltage drops. Output ripple will also increase with each phase that is eliminated. Low Voltage Start-Up The LTC3425 includes an independent start-up oscillator designed to start up at input voltages as low as 0.88V. The frequency and peak current limit during start-up are
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LTC3425
OPERATIO U
SWITCH A VOLTAGE SWITCH B VOLTAGE SWITCH C VOLTAGE SWITCH D VOLTAGE INDUCTOR A CURRENT INDUCTOR B CURRENT INDUCTOR C CURRENT INDUCTOR D CURRENT INPUT CURRENT RECTIFIER A CURRENT RECTIFIER B CURRENT RECTIFIER C CURRENT RECTIFIER D CURRENT OUTPUT RIPPLE CURRENT
3432 F03
Figure 3. Simplified Voltage and Current Waveforms for 4-Phase Operation at 75% Duty Cycle
internally controlled. The device can start up under some load (see the graph Start-Up Current vs Input Voltage). Soft-start and inrush current limiting is provided during start-up as well as normal mode. The same soft-start capacitor is used for each operating mode. During start-up, all four phases switch in unison. When either VIN or VOUT exceeds 2.3V, the IC enters normal operating mode. Once the output voltage exceeds the input by 0.3V, the IC powers itself from VOUT instead of
VIN. At this point the internal circuitry has no dependency on the VIN input voltage, eliminating the requirement for a large input capacitor. The input voltage can drop as low as 0.5V without affecting circuit operation. The limiting factor for the application becomes the ability of the power source to supply sufficient energy to the output at the low voltages, and the maximum duty cycle which is clamped at 90%.
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LTC3425
OPERATIO
98
TJ = 25C 96 VIN = 2.4V VOUT = 3.3V 94
EFFICIENCY (%)
92 90 4 PHASE 88 86 2 PHASE 84 82 80 100 1000 LOAD (mA) 10000
3425 G13
Figure 4. LTC3425 Efficiency vs Load for 2-, 3- and 4-Phase Operation
Low Noise Fixed Frequency Operation Shutdown: The part is shut down by pulling the SHDN pin below 0.25V and made active by pulling the pin above 1V. Note that the SHDN pin can be driven above VIN or VOUT, as long as it is limited to less than 5.5V. Soft-Start: The soft-start time is programmed with an external capacitor to ground on the SS pin. An internal current source charges it with a nominal 2.5A (1A while in start-up mode when VIN and VOUT are both below 2.3V). The voltage on the soft-start pin (in conjunction with the external resistor on the ILIM pin) is used to control the peak current limit until the voltage on the capacitor exceeds 1.6V, at which point the external resistor sets the peak current. In the event of a commanded shutdown or a thermal shutdown, the capacitor is discharged automatically. Note that Burst Mode operation is inhibited during the soft-start time. t(ms) = CSS(F) * 320 Oscillator: The frequency of operation is set through a resistor from the RT pin to ground. An internally trimmed timing capacitor resides inside the IC. The internal oscillator frequency is then divided by four to generate the four phases, each phase shifted by 90. The oscillator frequency and resulting switching frequency of each of the four phases are calculated using the following formula:
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fOSC = 60 RT fOSC 15 = 4 RT fSWITCH =
where fOSC is in MHz and RT is in k.
3 PHASE
The oscillator can be synchronized with an external clock applied to the SYNCIN pin. When synchronizing the oscillator, the free running frequency must be set to an approximately 30% lower frequency than the desired synchronized frequency. A SYNCOUT pin is provided for synchronizing two or more devices. The output sync pulse is 180 out of phase from the internal oscillator, allowing two devices to be synchronized to create an 8-phase converter. Note that in Burst Mode operation, the oscillator is turned off and the SYNCOUT pin is driven low. In fixed frequency operation, the minimum on-time before pulse skipping occurs (at light load) is typically 110ns. Current Sensing: Lossless current sensing converts the peak current signal to a voltage to sum in with the internal slope compensation. This summed signal is compared to the error amplifier output to provide a peak current control command for the PWM. The slope compensation in the IC is adaptive to the input and output voltage, therefore the converter provides the proper amount of slope compensation to ensure stability, but not an excess to cause a loss of phase margin in the converter. Error Amp: The error amplifier is a transconductance amplifier with its positive input internally connected to the 1.22V reference and its negative input connected to the FB pin. A simple compensation network is placed from the COMP pin to ground. Internal clamps limit the minimum and maximum error amp output voltage for improved large-signal transient response. During Burst Mode operation, the compensation pin is high impedance, however clamps limit the voltage on the external compensation network, preventing the compensation capacitor from discharging to zero.
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LTC3425
OPERATIO
Current Limit: The programmable current limit circuit sets the maximum peak current in the NMOS switches. The current limit level is programmed using a resistor to ground on the ILIM pin. Do not use values below 75k. In Burst Mode operation, the current limit is automatically set to a nominal value of 0.6A peak for optimal efficiency. ILIM = 130 per Phase R
where I is in Amps and R is in k. Synchronous Rectifier and Zero Current Amp: To prevent the inductor current from running away, the PMOS synchronous rectifier is only enabled when V OUT > (VIN + 0.3V) and the FB pin is > 0.8V.The zero current amplifier monitors the inductor current to the output and shuts off the synchronous rectifier once the current is below 50mA typical, preventing negative inductor current. If the CCM pin is tied high, the amplifier will allow up to 0.6A of negative current in the synchronous rectifier. Antiringing Control: The antiringing control connects a resistor across the inductor to damp the ringing on the SW pin in discontinuous conduction mode. The LCSW ringing (L = inductor, CSW = Capacitance on Switch pin) is low energy, but can cause EMI radiation. Power Good: An internal comparator monitors the FB pin voltage. If the FB pin drops 11.4% below the regulation value, the PGOOD pin will pull low (sink current should be limited to 10mA max). The output will stay low until the FB voltage is within 9.5% of the regulation voltage. A filter prevents noise spikes from causing nuisance trips. Reference Output: The internal 1.22V reference is buffered and brought out to the REFOUT pin. It is active when the REFEN pin is pulled high (above 1.4V). For stability, a minimum of 0.1F capacitor must be placed on the REFOUT pin. The output can source up to 100A and sink up to 10A. For the lowest possible quiescent current in Burst Mode operation, the reference output should be disabled by grounding the REFEN pin. Thermal Shutdown: An internal temperature monitor will start to reduce the programmed peak current limit if the die temperature exceeds 135C. If the die temperature continues to rise and reaches 150C, the part will go into
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thermal shutdown and all switches will be turned off and the soft-start capacitor will be reset. The part will be enabled again when the die temperature has dropped about 10C. Note: Overtemperature protection is intended to protect the device during momentary overload conditions. Continuous operation above the specified maximum operating junction temperature may result in device degradation or failure. Burst Mode Operation Burst Mode operation can be automatic or user controlled. In automatic operation, the IC will automatically enter Burst Mode operation at light load and return to fixed frequency PWM mode for heavier loads. The user can program the average load current at which the mode transition occurs using a single resistor. During Burst Mode operation, only Phase A is active and the other three phases are turned off, reducing quiescent current and switching losses by 75%. Note that the oscillator is also shut down in this mode, since the on time is determined by the time it takes the inductor current to reach a fixed peak current, and the off time is determined by the time it takes for the inductor current to return to zero. In Burst Mode operation, the IC delivers energy to the output until it is regulated and then goes into a sleep mode where the outputs are off and the IC is consuming only 12A of quiescent current. In this mode, the output ripple has a variable frequency component with load current and will be typically 2% peak-peak. This maximizes efficiency at very light loads by minimizing switching and quiescent losses. Burst Mode ripple can be reduced slightly by using more output capacitance (47F or greater). This capacitor does not need to be a low ESR type if low ESR ceramics are also used. Another method of reducing Burst Mode ripple is to place a small feedforward capacitor across the upper resistor in the VOUT feedback divider network. During Burst Mode operation, the COMP pin is disconnected from the error amplifier in an effort to hold the voltage on the external compensation network where it was before entering Burst Mode operation. To minimize the effects of leakage current and stray resistance, voltage clamps limit the min and max voltage on COMP during
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LTC3425
OPERATIO
Burst Mode operation. This minimizes the transient experienced when a heavy load is suddenly applied to the converter after being in Burst Mode operation for an extended period of time. For automatic operation, an RC network should be connected from the BURST pin to ground. The value of the resistor will control the average load current (IBURST) at which Burst Mode operation will be entered and exited (there is hysteresis to prevent oscillation between modes). The equation given for the capacitor on the BURST pin is for the minimum value, to prevent ripple on the BURST pin from causing the part to oscillate in and out of Burst Mode operation at the current where the mode transition occurs.
IBURST = to leave Burst Mode operation RBURST 1.7 IBURST = to enter Burst Mode operation RBURST 2.75
where RBURST is in k and IBURST is in Amps. For load currents under 20mA, refer to the curve Automatic Burst Mode Thresholds vs RBURST.
CBURST = COUT * VOUT 10, 000
where CBURST(MIN) and COUT are in F. When the voltage on the BURST pin drops below 0.94V, the part will enter Burst Mode operation. When the BURST pin voltage is above 1.06V, it will be in fixed frequency mode. In the event that a sudden load transient causes the feedback pin to drop by more than 4% from the regulation value, an internal pull-up is applied to the BURST pin, forcing the part quickly out of Burst Mode operation. For optimum transient response when going between Burst Mode operation and PWM mode, the mode should be controlled manually by the host. This way PWM mode can be commanded before the load step occurs, minimizing output voltage droop. For manual control of Burst Mode operation, the RC network can be eliminated. To force fixed frequency PWM mode, the BURST pin should be connected to VOUT. To force Burst Mode operation, the BURST pin should be grounded. The circuit connected to
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the BURST pin should be able to sink up to 2mA. Note that Burst Mode operation is inhibited during start-up and soft-start. Note that if VIN is raised to within 200mV or less below VOUT, the part will exit Burst Mode operation and the synchronous rectifier will be disabled. It will remain in fixed frequency mode until VIN is at least 300mV below VOUT. If the load applied during forced Burst Mode operation (BURST = GND) exceeds the current that can be supplied, the output voltage will start to droop and the part will automatically come out of Burst Mode operation and enter fixed frequency mode, raising VOUT. The part will then enter Burst Mode operation once again, the cycle will repeat, resulting in about 4% output ripple. The maximum current that can be supplied in Burst Mode operation is given by:
IO(MAX) = 0.60 in Amps VOUT - VIN 2 * 1+ VIN
Output Disconnect and Inrush Limiting The LTC3425 is designed to allow true output disconnect by eliminating body diode conduction of the internal PMOS rectifiers. This allows VOUT to go to zero volts during shutdown, drawing no current from the input source. It also allows for inrush current limiting at turn-on, minimizing surge currents seen by the input supply. Note that to obtain the advantages of output disconnect, there cannot be any external Schottky diodes connected between the switch pins and VOUT. Note: Board layout is extremely critical to minimize voltage overshoot on the switch pins due to stray inductance. Keep the output filter capacitors as close as possible to the VOUT pins, and use very low ESR/ESL ceramic capacitors tied to a good ground plane. For applications with VOUT over 4.3V, Schottky diodes are required to limit the peak switch voltage to less than 6V. These must also be very close to minimize stray inductance. See the section Applications Where VOUT > 4.3V.
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LTC3425
APPLICATIO S I FOR ATIO
CIN L1 CSS RT L4
COUT LTC3425 COUT
COUT COUT
L2
L3
Figure 5. Typical Board Layout
LTC3425
3425 F06
Figure 6. Example Board Layout for a 10W, 4-Phase Boost Converter. Total Area = 0.50in2 (with All Components Mounted on the Topside of Board)
COMPONENT SELECTION Inductor Selection The high frequency, multiphase operation of the LTC3425 allows the use of small surface mount inductors. The minimum inductance value is proportional to the operating frequency and is limited by the following constraints:
L>
where:
VIN(MIN) * VOUT(MAX) - VIN(MIN) 2 and L > f f * Ripple * VOUT(MAX)
(
f = Operating frequency in MHz (of each phase) Ripple = Allowable inductor current ripple (amps peak-peak) VIN(MIN) = Minimum input voltage VOUT(MAX) = Maximum output voltage
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The inductor current ripple is typically set to 20% to 40% of the maximum inductor current. For high efficiency, choose an inductor with high frequency core material, such as ferrite to reduce core loses. The inductor should have low ESR (equivalent series resistance) to reduce the I2R losses, and must be able to handle the peak inductor current without saturating. To minimize radiated noise, use a shielded inductor. (Note that the inductance of shielded types will drop more as current increases, and will saturate more easily). See Table 2 for a list of inductor manufacturers.
Table 2. Inductor Vendor Information
3425 F05
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SUPPLIER Coilcraft Murata Sumida
TDK
PHONE (847) 639-6400 USA: (814) 237-1431 USA: (847) 956-0666 Japan: 81-3-3607-5111 (847) 803-6100
FAX (847) 639-1469 USA: (814) 238-0490 USA: (847) 956-0702 Japan: 81-3-3607-5144 (847) 803-6296
WEB SITE www.coilcraft.com www.murata.com www.japanlink.com/ sumida
www.component. tdk.com
Some example inductor part types are: Coilcraft DO-1608, DS-1608 and DT-1608 series Murata LQH3C, LQH4C, LQH32C and LQN6C series Sumida CDRH3D16, CDRH4D18, CDRH4D28, CR32, CR43 series TDK RLF5018T and NLFC453232T series Output Capacitor Selection The output voltage ripple has three components to it. The bulk value of the capacitor is set to reduce the ripple due to charge into the capacitor each cycle. The max ripple due to charge is given by:
)
VRBULK =
IP * VIN COUT * VOUT * f * 4
where: IP = peak inductor current f = switching frequency of one phase
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LTC3425
APPLICATIO S I FOR ATIO
The ESR (equivalent series resistance) is usually the most dominant factor for ripple in most power converters. The ripple due to capacitor ESR is given by: VRCESR = IP * CESR where CESR = Capacitor Series Resistance The ESL (equivalent series inductance) is also an important factor for high frequency converters. Using small, surface mount ceramic capacitors, placed as close as possible to the VOUT pins, will minimize ESL. Low ESR/ESL capacitors should be used to minimize output voltage ripple. For surface mount applications, AVX TPS Series tantalum capacitors, Sanyo POSCAP or X5R type ceramic capacitors are recommended. In all applications, a minimum of 1F, low ESR ceramic capacitor should be placed as close to each of the four VOUT pins as possible, and grounded to a local ground plane. Input Capacitor Selection The input filter capacitor reduces peak currents drawn from the input source and reduces input switching noise. Since the IC can operate at voltages below 0.5V once the output is regulated (as long as SHDN is above 0.65V), the demand on the input capacitor to lower ripple is much less. Taiyo Yuden offers very low ESR capacitors, for example the 2.2F in a 0603 case (JMK107BJ22MA). See Table 3 for a list of capacitor manufacturers for input and output capacitor selection.
Table 3. Capacitor Vendor Information
PHONE (803) 448-9411 (619) 661-6322 (847) 803-6100 USA: (814) 237-1431 (800) 831-9172 Taiyo Yuden (408) 573-4150 SUPPLIER AVX Sanyo TDK Murata FAX (803) 448-1943 (619) 661-1055 (847) 803-6296 USA: (814) 238-0490 WEB SITE www.avxcorp.com www.sanyovideo.com www.component.tdk.com www.murata.com
(408) 573-4159 www.t-yuden.com
Applications Where VOUT > 4.3V Due to the very high slew rates associated with the switch nodes, Schottky diode clamps are required in any application where VOUT can exceed 4.3V to prevent the switch
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voltage from exceeding its maximum rating during the break-before-make time. Surface mount diodes, such as the MBR0520L or equivalent, must be used and must be located very close to the pins to minimize stray inductance. Two example application circuits are shown in Figures 7 and 8, one with output disconnect and one without. Operating Frequency Selection There are several considerations in selecting the operating frequency of the converter. The first is, which are the sensitive frequency bands that cannot tolerate any spectral noise? For example, in products incorporating RF communications, the 455kHz IF frequency is sensitive to any noise, therefore switching above 600kHz is desired. Some communications have sensitivity to 1.1MHz, and in that case, a 1.5MHz converter frequency may be employed. The second consideration is the physical size of the converter. As the operating frequency goes up, the inductor and filter capacitors go down in value and size. The trade off is in efficiency, since the switching losses increase proportionally with frequency. Thermal Considerations To deliver the power that the LTC3425 is capable of, it is imperative that a good thermal path be provided to dissipate the heat generated within the package. This can be accomplished by taking advantage of the large thermal pad on the underside of the IC. It is recommended that multiple vias in the printed circuit board be used to conduct heat away from the IC and into a copper plane with as much area as possible. In the event that the junction temperature gets too high, the peak current limit will automatically be decreased. If the junction temperature continues to rise, the part will go into thermal shutdown, and all switching will stop until the temperature drops. Closing the Feedback Loop The LTC3425 uses current mode control with internal adaptive slope compensation. Current mode control eliminates the 2nd order filter, due to the inductor and output capacitor exhibited in voltage mode controllers, and simplifies it to a single pole filter response. The product of the
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LTC3425
APPLICATIO S I FOR ATIO
VIN 3.3V CIN 2.2F L1 2.7H
VIN SHDN REFOUT CCM REFEN SYNCIN VOUT BURST RT RT 12.1k RLIM 75k ILIM SGND
SWA
SWB
LTC3425 FB COMP SS SYNCOUT PGOOD GNDC GNDD
GNDA
GNDB
CIN: TAIYO YUDEN JMK107BJ225MA CS: TAIYO YUDEN LMK107BJ474KA COUT: TAIYO YUDEN JMK212BJ475MG (x4) CBULK: AVX TPSD157M006R0050
Figure 7. Application Circuit for VOUT > 4.3V with Inrush Limiting and Output Disconnect
VIN 3.3V CIN 2.2F L1 2.7H L2 2.7H L3 2.7H L4 2.7H
VIN SHDN REFOUT CCM REFEN SYNCIN VOUT BURST RT RT 12.1k RLIM 75k ILIM SGND
SWA
SWB
LTC3425 FB COMP SS SYNCOUT PGOOD GNDC GNDD
GNDA
GNDB
CIN: TAIYO YUDEN JMK107BJ225MA COUT: TAIYO YUDEN JMK212BJ475MG (x4) CBULK: AVX TPSD157M006R0050
Figure 8. Application Circuit for VOUT > 4.3V When Inrush Limiting and Output Disconnect are Not Required
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L2 2.7H L3 2.7H L4 2.7H D1 D2 D3 D4 CS 0.47F x2 SWC SWD VOUTS VOUTA VOUTB VOUTC VOUTD Q1 COUT 4.7F x4
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+
R2 309k R4 100k
CBULK 150F 6.3V
VOUT 5V 2.5A
C2 220pF CSS 0.01F R3 100k
R1 100k PGOOD
3425 F07
D1 TO D4: MOTOROLA MBR0520L L1 TO L4: TDK RLF5018T-2R7M1R8 Q1: ZETEX ZXM61P02F
D1 D2 D3 D4
SWC
SWD VOUTS VOUTA VOUTB VOUTC VOUTD
COUT 4.7F x4
+
R2 309k R4 100k
CBULK 150F 6.3V
VOUT 5V 2.5A
C2 220pF CSS 0.01F R3 100k
R1 100k PGOOD
3425 F08
D1 TO D4: MOTOROLA MBR0520LT1 L1 TO L4: TDK RLF5018T-2R7M1R8
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LTC3425
APPLICATIO S I FOR ATIO
GDC = GCONTROLOUTPUT * GEA 2 * VIN GCONTROL = , GEA 5, 000 IOUT
modulator control to output DC gain, and the error amp open-loop gain gives the DC gain of the system:
The output filter pole is given by:
IOUT * VOUT * COUT where COUT is the output filter capacitor. The output filter zero is given by: FFILTERPOLE =
2 * * RESR * COUT where RESR is the output capacitor equivalent series resistance. FFILTERZERO = 1
A troublesome feature of the boost regulator topology is the right half plane zero (RHP), and is given by:
FRHPZ = VIN2 2 * * IOUT * L
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At heavy loads this gain increase with phase lag can occur at a relatively low frequency. The loop gain is typically rolled off before the RHP zero frequency. The typical error amp compensation is shown in Figure 9. The equations for the loop dynamics are as follows:
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1 2 * * 100e6 * CC1 which is extremely close to DC 1 FZERO1 = 2 * * RZ * CC1 1 FPOLE2 = 2 * * RZ * CC2 FPOLE1
+
ERROR AMP VOUT 1.25V R1 FB VC CC1 RZ CC2
3425 F09
-
R2
Figure 9
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LTC3425
TYPICAL APPLICATIO S
Single or Dual Cell to 3.3V Boost with Automatic Burst Mode Operation
VIN = 1.1V TO 3V
+
CIN 2.2F
SHDN REFOUT CCM REFEN SYNCIN BURST C3 0.056F RT 15k RLIM 75k RT ILIM SGND GNDA GNDB LTC3425
R4 20k
CBULK: AVX TPSD157M004R0050 CIN: TAIYO YUDEN JMK107BJ225MA
U
VIN
L1 2.2H SWA
L2 2.2H
L3 2.2H
L4 2.2H
SWB
SWC
SWD VOUTS VOUTA VOUTB VOUTC VOUTD
R5 10k C1 22pF COUT 4.7F x4 R2 511k R5 100k
+
CBULK 150F 4V
VOUT 3.3V 1A
FB COMP SS SYNCOUT PGOOD GNDC GNDD
C2 220pF CSS 0.01F R3 100k
R1 301k PGOOD
3425 TA03
COUT: TAIYO YUDEN JMK212BJ475MG (x4) L1 TO L4: MURATA LQH4C2R2M04
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LTC3425
TYPICAL APPLICATIO S
Application with User Commanded Burst Mode Operation and Buffered Reference Output Enabled
VIN = 1.8V TO 3V
+
VREF C1 0.1F VOUT
BURST PWM
RT 30.1k RLIM 75k
CIN: TAIYO YUDEN JMK107BJ225MA COUT: TAIYO YUDEN JMK212BJ475MG (x4) L1 TO L4: SUMIDA CDRH4D28
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CIN 2.2F
L1 3.3H VIN SWA
L2 3.3H
L3 3.3H
L4 3.3H
SWB
SWC
SHDN REFOUT CCM REFEN SYNCIN BURST RT ILIM SGND GNDA GNDB LTC3425
SWD VOUTS VOUTA VOUTB VOUTC VOUTD
R4 10k C3 22pF COUT 4.7F x4 R2 511k R4 100k
VOUT 3.3V 2A
FB COMP SS SYNCOUT PGOOD GNDC GNDD
C2 330pF CSS 0.01F R3 33k
R1 301k PGOOD
3425 TA04
3425p
LTC3425
PACKAGE DESCRIPTIO U
UH Package 32-Lead Plastic QFN (5mm x 5mm)
(Reference LTC DWG # 05-08-1693)
0.57 0.05 PACKAGE OUTLINE 0.23 0.05 0.50 BSC RECOMMENDED SOLDER PAD LAYOUT 5.00 0.10 (4 SIDES) 0.75 0.05 0.00 - 0.05 BOTTOM VIEW--EXPOSED PAD R = 0.115 TYP 31 32 0.40 0.10 1 2 3.45 0.10 (4-SIDES)
(UH) QFN 0102
5.35 0.05 4.20 0.05 3.45 0.05 (4 SIDES)
PIN 1 TOP MARK
0.200 REF NOTE: 1. DRAWING PROPOSED TO BE A JEDEC PACKAGE OUTLINE M0-220 VARIATION WHHD-(X) (TO BE APPROVED) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED
0.23 0.05 0.50 BSC
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LTC3425
TYPICAL APPLICATIO
VIN 2.5V
10MHz, High Current, Very Low Profile, 8-Phase Converter Using Two LTC3425s Operating in Fixed Frequency Mode with Forced CCM (Max Component Height = 1.6mm)
CIN1 2.2F CIN2 2.2F
L1 1H VIN SWA
L2 1H SWB
L3 1H SWC
SHDN REFOUT VOUT CCM REFEN SYNCIN BURST RT RT1 12.1k R5 75k ILIM SGND GNDA GNDB LTC3425
SWD VOUTS VOUTA VOUTB VOUTC VOUTD
FB COMP SS SYNCOUT PGOOD GNDC GNDD
CIN1,2: TAIYO YUDEN JMK107BJ225MA COUT: TAIYO YUDEN JMK212BJ475MG (x8) L1 TO L8: MURATA LQH32CN1R0M51
RELATED PARTS
PART NUMBER LT(R)1370/LT1370HV LT1371/LT1371HV LT1613 LT1618 LTC1700 LTC1871 LT1930/LT1930A LT1946/LT1946A LT1961 LTC3400/LTC3400B LTC3401 LTC3701 DESCRIPTION 6A (ISW) 500kHz, High Efficiency Step-Up DC/DC Converters 3A (ISW) 500kHz, High Efficiency Step-Up DC/DC Converters 550mA (ISW) 1.4MHz, High Efficiency Step-Up DC/DC Converter 1.5A (ISW) 1.25MHz, High Efficiency Step-Up DC/DC Converter No RSENSETM 530kHz, Synchronous Step-Up DC/DC Controller Wide Input Range, 1MHz, No RSENSE Current Mode Boost, Flyback and SEPIC Controller 1A (ISW) 1.2MHz/2.2MHz, High Efficiency Step-Up DC/DC Converters 1.5A (ISW) 1.2MHz/2.7MHz, High Efficiency Step-Up DC/DC Converters 1.5A (ISW) 1.25MHz, High Efficiency Step-Up DC/DC Converter 600mA (ISW) 1.2MHz, Synchronous Step-Down DC/DC Converters 1A (ISW) 3MHz, Synchronous Step-Up DC/DC Converter 2-Phase, 550kHz, Low Input Voltage, Dual Step-Down DC/DC Controller COMMENTS VIN: 2.7V to 30V, VOUT(MAX): 35V/42V, IQ: 4.5mA, ISD: <12A, DD, TO220-7 VIN: 2.7V to 30V, VOUT(MAX): 35V/42V, IQ: 4mA, ISD: <12A, DD, TO220-7, S20 90% Efficiency, VIN: 0.9V to 10V, VOUT(MAX): 34V, IQ: 3mA, ISD: <1A, ThinSOT 90% Efficiency, VIN: 1.6V to 18V, VOUT(MAX): 35V, IQ: 1.8mA, ISD: <1A, MS10 95% Efficiency, VIN: 0.9V to 5V, IQ: 200A, ISD: <10A, MS10 92% Efficiency, VIN: 2.5V to 36V, IQ: 250A, ISD: <10A, MS10 High Efficiency, VIN: 2.6V to 16V, VOUT(MAX): 34V, IQ: 4.2mA/5.5mA, ISD: <1A, ThinSOT High Efficiency, VIN: 2.45V to 16V, VOUT(MAX): 34V, IQ: 3.2mA, ISD: <1A, MS8 90% Efficiency, VIN: 3V to 25V, VOUT(MAX): 35V, IQ: 0.9mA, ISD: 6A, MS8E 92% Efficiency, VIN: 0.85V to 5V, VOUT(MAX): 5V, IQ: 19A/300A, ISD: <1A, ThinSOT 97% Efficiency, VIN: 0.5V to 5V, VOUT(MAX): 6V, IQ: 38A, ISD: <1A, MS10 97% Efficiency, VIN: 2.5V to 10V, IQ: 460A, ISD: <9A, SSOP-16
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 q FAX: (408) 434-0507
q
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L4 1H L5 1H SWA L6 1H SWB L7 1H SWC L8 1H SWD VOUTS VOUTA VOUTB VOUTC VOUTD VIN SHDN REFOUT COUT1 4.7F x4 VOUT RF4 17.4k CCM REFEN SYNCIN BURST RT ILIM RF3 10.2k RT2 14.7k R6 75k SGND GNDA GNDB FB COMP SS SYNCOUT PGOOD GNDC GNDD LTC3425 COUT2 4.7F x4 RF2 17.4k R4 100k VOUT 3.3V 5A C1 330pF CSS 0.022F R3 33k RF1 10.2k PGOOD
3425 TA05
3425p LT/TP 0603 1K PRINTED IN USA
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2003

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Price & Availability of LTC3425

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